The present invention generally relates to semiconductor devices, and particularly to the formation of differently sized features in a semiconductor substrate.
It may be necessary when manufacturing microelectronic devices to form features of different sizes and different depths in a silicon substrate. The ability to form differently sized features simultaneously is desirable. One exemplary structure sometimes requiring two differently sized features is an embedded dynamic random access memory device (eDRAM). An eDRAM device includes a number of individual cells having a capacitor that requires a trench etched in a semiconductor substrate. To isolate the cells from other devices on the same substrate, a moat may be formed around the cells and filled with an insulating material. In order for the moat to effectively isolate the eDRAM cells, the moat may be deeper and wider than each eDRAM cell. Therefore, it may be desirable to have a method for simultaneously forming broader and deeper moats, along with narrower and shallower trenches.